mirror of
https://git.savannah.gnu.org/git/grub.git
synced 2026-10-22 15:22:39 +00:00
Update the netboot stuff to Etherboot-5.0.5. * configure.in (--enable-3c590): Removed. This was a mistake. (--enable-davicom): New option. (--enable-eepro): Likewise. (--enable-natsemi): Likewise. (--enable-ni5010): Likewise. (--enable-sis900): Likewise. (--enable-w89c840): Likewise. (--enable-3c509-hack): Removed. (--enable-ns8390-force-16bit): Likewise. * netboot/Makefile.am (libdrivers_a_SOURCES): Added timer.c and timer.h. (EXTRA_libdrivers_a_SOURCES): Added davicom.c, eepro.c, fa311.c, natsemi.c, ni5010.c, sis900.c, sis900.h, tlan.c and w89c840.c. (EXTRA_DIST): Added sis900.txt. (3c595_drivers): Remove 3c590.o from this. (davicom_drivers): New variable. (eepro_drivers): Likewise. (natsemi_drivers): Likewise. (ni5010_drivers): Likewise. (sis900_drivers): Likewise. (w89c840_drivers): Likewise. (3c590_o_CFLAGS): Removed. (davicom_o_CFLAGS): New variable. (eepro_o_CFLAGS): Likewise. (natsemi_o_CFLAGS): Likewise. (ni5010_o_CFLAGS): Likewise. (sis900_o_CFLAGS): Likewise. (w89c840_o_CFLAGS): Likewise. * netboot/davicom.c: New file, from Etherboot-5.0.5. * netboot/eepro.c: Likewise. * netboot/natsemi.c: Likewise. * netboot/ni5010.c: Likewise. * netboot/sis900.c: Likewise. * netboot/sis900.h: Likewise. * netboot/sis900.txt: Likewise. * netboot/timer.c: Likewise. * netboot/timer.h: Likewise. * netboot/w89c840.c: Likewise. * netboot/fa311.c: Likewise. * netboot/tlan.c: Likewise. * netboot/3c509.c: Copied from Etherboot-5.0.5. * netboot/3c509.h: Likewise. * netboot/3c595.c: Likewise. * netboot/3c90x.c: Likewise. * netboot/3c90x.txt: Likewise. * netboot/cards.h: Likewise. * netboot/cs89x0.c: Likewise. * netboot/depca.c: Likewise. * netboot/eepro100.c: Likewise. * netboot/epic100.c: Likewise. * netboot/i82586.c: Likewise. * netboot/lance.c: Likewise. * netboot/linux-asm-string.h: Likewise. * netboot/nic.h: Likewise. * netboot/ns8390.c: Likewise. * netboot/ns8390.h: Likewise. * netboot/otulip.c: Likewise. * netboot/pci.h: Likewise. * netboot/rtl8139.c: Likewise. * netboot/sk_g16.c: Likewise. * netboot/smc9000.c: Likewise. * netboot/tiara.c: Likewise. * netboot/tulip.c: Likewise. * netboot/via-rhine.c: Likewise. * netboot/config.c: Applied a diff between Etherboot-4.6.18 and Etherboot-5.0.5 manually. * netboot/main.c: Likewise. * netboot/pci.c: Likewise. * netboot/etherboot.h: Rewritten mostly from scratch, based on the same file in Etherboot-5.0.5. * netboot/misc.c: Likewise. * netboot/osdep.h: Likewise. * netboot/fsys_tftp.c (GRUB): Defined. (buf_fill): Use rfc2131_sleep_interval instead of rfc951_sleep. * stage2/builtins.c [SUPPORT_NETBOOT] (GRUB): Defined. (boot_func) [SUPPORT_NETBOOT]: Call cleanup_net. * stage2/cmdline.c [SUPPORT_DISKLESS] (GRUB): Defined. * stage2/common.c [SUPPORT_DISKLESS] (GRUB): Likewise.
502 lines
13 KiB
C
502 lines
13 KiB
C
/*
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** Support for NE2000 PCI clones added David Monro June 1997
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** Generalised to other NICs by Ken Yap July 1997
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**
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** Most of this is taken from:
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**
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** /usr/src/linux/drivers/pci/pci.c
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** /usr/src/linux/include/linux/pci.h
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** /usr/src/linux/arch/i386/bios32.c
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** /usr/src/linux/include/linux/bios32.h
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** /usr/src/linux/drivers/net/ne.c
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*/
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/*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2, or (at
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* your option) any later version.
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*/
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#include "etherboot.h"
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#include "pci.h"
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/*#define DEBUG 1*/
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#define DEBUG 0
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#ifdef CONFIG_PCI_DIRECT
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#define PCIBIOS_SUCCESSFUL 0x00
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/*
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* Functions for accessing PCI configuration space with type 1 accesses
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*/
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#define CONFIG_CMD(bus, device_fn, where) (0x80000000 | (bus << 16) | (device_fn << 8) | (where & ~3))
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int pcibios_read_config_byte(unsigned int bus, unsigned int device_fn,
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unsigned int where, unsigned char *value)
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{
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outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
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*value = inb(0xCFC + (where&3));
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return PCIBIOS_SUCCESSFUL;
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}
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int pcibios_read_config_word (unsigned int bus,
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unsigned int device_fn, unsigned int where, unsigned short *value)
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{
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outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
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*value = inw(0xCFC + (where&2));
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return PCIBIOS_SUCCESSFUL;
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}
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int pcibios_read_config_dword (unsigned int bus, unsigned int device_fn,
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unsigned int where, unsigned int *value)
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{
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outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
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*value = inl(0xCFC);
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return PCIBIOS_SUCCESSFUL;
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}
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int pcibios_write_config_byte (unsigned int bus, unsigned int device_fn,
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unsigned int where, unsigned char value)
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{
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outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
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outb(value, 0xCFC + (where&3));
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return PCIBIOS_SUCCESSFUL;
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}
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int pcibios_write_config_word (unsigned int bus, unsigned int device_fn,
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unsigned int where, unsigned short value)
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{
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outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
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outw(value, 0xCFC + (where&2));
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return PCIBIOS_SUCCESSFUL;
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}
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int pcibios_write_config_dword (unsigned int bus, unsigned int device_fn, unsigned int where, unsigned int value)
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{
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outl(CONFIG_CMD(bus,device_fn,where), 0xCF8);
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outl(value, 0xCFC);
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return PCIBIOS_SUCCESSFUL;
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}
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#undef CONFIG_CMD
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#else /* CONFIG_PCI_DIRECT not defined */
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static struct {
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unsigned long address;
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unsigned short segment;
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} bios32_indirect = { 0, KERN_CODE_SEG };
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static long pcibios_entry;
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static struct {
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unsigned long address;
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unsigned short segment;
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} pci_indirect = { 0, KERN_CODE_SEG };
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static unsigned long bios32_service(unsigned long service)
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{
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unsigned char return_code; /* %al */
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unsigned long address; /* %ebx */
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unsigned long length; /* %ecx */
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unsigned long entry; /* %edx */
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unsigned long flags;
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save_flags(flags);
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%edi)"
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#else
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"lcall *(%%edi)"
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#endif
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: "=a" (return_code),
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"=b" (address),
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"=c" (length),
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"=d" (entry)
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: "0" (service),
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"1" (0),
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"D" (&bios32_indirect));
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restore_flags(flags);
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switch (return_code) {
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case 0:
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return address + entry;
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case 0x80: /* Not present */
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printf("bios32_service(%d) : not present\n", service);
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return 0;
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default: /* Shouldn't happen */
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printf("bios32_service(%d) : returned %#X, mail drew@colorado.edu\n",
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service, return_code);
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return 0;
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}
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}
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int pcibios_read_config_byte(unsigned int bus,
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unsigned int device_fn, unsigned int where, unsigned char *value)
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{
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unsigned long ret;
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unsigned long bx = (bus << 8) | device_fn;
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unsigned long flags;
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save_flags(flags);
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%esi)\n\t"
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#else
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"lcall *(%%esi)\n\t"
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#endif
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=c" (*value),
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"=a" (ret)
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: "1" (PCIBIOS_READ_CONFIG_BYTE),
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"b" (bx),
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"D" ((long) where),
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"S" (&pci_indirect));
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restore_flags(flags);
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return (int) (ret & 0xff00) >> 8;
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}
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int pcibios_read_config_word(unsigned int bus,
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unsigned int device_fn, unsigned int where, unsigned short *value)
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{
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unsigned long ret;
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unsigned long bx = (bus << 8) | device_fn;
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unsigned long flags;
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save_flags(flags);
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%esi)\n\t"
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#else
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"lcall *(%%esi)\n\t"
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#endif
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=c" (*value),
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"=a" (ret)
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: "1" (PCIBIOS_READ_CONFIG_WORD),
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"b" (bx),
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"D" ((long) where),
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"S" (&pci_indirect));
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restore_flags(flags);
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return (int) (ret & 0xff00) >> 8;
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}
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int pcibios_read_config_dword(unsigned int bus,
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unsigned int device_fn, unsigned int where, unsigned int *value)
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{
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unsigned long ret;
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unsigned long bx = (bus << 8) | device_fn;
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unsigned long flags;
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save_flags(flags);
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%esi)\n\t"
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#else
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"lcall *(%%esi)\n\t"
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#endif
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=c" (*value),
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"=a" (ret)
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: "1" (PCIBIOS_READ_CONFIG_DWORD),
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"b" (bx),
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"D" ((long) where),
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"S" (&pci_indirect));
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restore_flags(flags);
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return (int) (ret & 0xff00) >> 8;
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}
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int pcibios_write_config_byte (unsigned int bus,
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unsigned int device_fn, unsigned int where, unsigned char value)
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{
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unsigned long ret;
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unsigned long bx = (bus << 8) | device_fn;
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unsigned long flags;
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save_flags(flags); cli();
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%esi)\n\t"
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#else
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"lcall *(%%esi)\n\t"
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#endif
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (ret)
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: "0" (PCIBIOS_WRITE_CONFIG_BYTE),
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"c" (value),
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"b" (bx),
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"D" ((long) where),
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"S" (&pci_indirect));
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restore_flags(flags);
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return (int) (ret & 0xff00) >> 8;
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}
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int pcibios_write_config_word (unsigned int bus,
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unsigned int device_fn, unsigned int where, unsigned short value)
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{
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unsigned long ret;
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unsigned long bx = (bus << 8) | device_fn;
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unsigned long flags;
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save_flags(flags); cli();
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%esi)\n\t"
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#else
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"lcall *(%%esi)\n\t"
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#endif
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (ret)
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: "0" (PCIBIOS_WRITE_CONFIG_WORD),
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"c" (value),
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"b" (bx),
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"D" ((long) where),
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"S" (&pci_indirect));
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restore_flags(flags);
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return (int) (ret & 0xff00) >> 8;
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}
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int pcibios_write_config_dword (unsigned int bus,
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unsigned int device_fn, unsigned int where, unsigned int value)
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{
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unsigned long ret;
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unsigned long bx = (bus << 8) | device_fn;
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unsigned long flags;
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save_flags(flags); cli();
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%esi)\n\t"
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#else
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"lcall *(%%esi)\n\t"
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#endif
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:"
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: "=a" (ret)
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: "0" (PCIBIOS_WRITE_CONFIG_DWORD),
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"c" (value),
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"b" (bx),
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"D" ((long) where),
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"S" (&pci_indirect));
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restore_flags(flags);
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return (int) (ret & 0xff00) >> 8;
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}
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static void check_pcibios(void)
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{
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unsigned long signature;
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unsigned char present_status;
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unsigned char major_revision;
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unsigned char minor_revision;
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unsigned long flags;
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int pack;
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if ((pcibios_entry = bios32_service(PCI_SERVICE))) {
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pci_indirect.address = pcibios_entry;
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save_flags(flags);
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__asm__(
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#ifdef ABSOLUTE_WITHOUT_ASTERISK
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"lcall (%%edi)\n\t"
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#else
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"lcall *(%%edi)\n\t"
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#endif
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"jc 1f\n\t"
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"xor %%ah, %%ah\n"
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"1:\tshl $8, %%eax\n\t"
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"movw %%bx, %%ax"
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: "=d" (signature),
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"=a" (pack)
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: "1" (PCIBIOS_PCI_BIOS_PRESENT),
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"D" (&pci_indirect)
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: "bx", "cx");
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restore_flags(flags);
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present_status = (pack >> 16) & 0xff;
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major_revision = (pack >> 8) & 0xff;
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minor_revision = pack & 0xff;
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if (present_status || (signature != PCI_SIGNATURE)) {
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printf("ERROR: BIOS32 says PCI BIOS, but no PCI "
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"BIOS????\n");
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pcibios_entry = 0;
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}
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#if DEBUG
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if (pcibios_entry) {
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printf ("pcibios_init : PCI BIOS revision %hhX.%hhX"
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" entry at %#X\n", major_revision,
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minor_revision, pcibios_entry);
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}
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#endif
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}
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}
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static void pcibios_init(void)
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{
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union bios32 *check;
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unsigned char sum;
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int i, length;
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unsigned long bios32_entry = 0;
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/*
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* Follow the standard procedure for locating the BIOS32 Service
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* directory by scanning the permissible address range from
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* 0xe0000 through 0xfffff for a valid BIOS32 structure.
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*
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*/
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for (check = (union bios32 *) 0xe0000; check <= (union bios32 *) 0xffff0; ++check) {
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if (check->fields.signature != BIOS32_SIGNATURE)
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continue;
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length = check->fields.length * 16;
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if (!length)
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continue;
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sum = 0;
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for (i = 0; i < length ; ++i)
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sum += check->chars[i];
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if (sum != 0)
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continue;
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if (check->fields.revision != 0) {
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printf("pcibios_init : unsupported revision %d at %#X, mail drew@colorado.edu\n",
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check->fields.revision, check);
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continue;
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}
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#if DEBUG
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printf("pcibios_init : BIOS32 Service Directory "
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"structure at %#X\n", check);
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#endif
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if (!bios32_entry) {
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if (check->fields.entry >= 0x100000) {
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printf("pcibios_init: entry in high "
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"memory, giving up\n");
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return;
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} else {
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bios32_entry = check->fields.entry;
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#if DEBUG
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printf("pcibios_init : BIOS32 Service Directory"
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" entry at %#X\n", bios32_entry);
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#endif
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bios32_indirect.address = bios32_entry;
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}
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}
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}
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if (bios32_entry)
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check_pcibios();
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}
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#endif /* CONFIG_PCI_DIRECT not defined*/
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static void scan_bus(struct pci_device *pcidev)
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{
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unsigned int devfn, l, bus, buses;
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unsigned char hdr_type = 0;
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unsigned short vendor, device;
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unsigned int membase, ioaddr, romaddr;
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int i, reg;
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unsigned int pci_ioaddr = 0;
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/* Scan all PCI buses, until we find our card.
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* We could be smart only scan the required busses but that
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* is error prone, and tricky.
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* By scanning all possible pci busses in order we should find
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* our card eventually.
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*/
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buses=256;
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for (bus = 0; bus < buses; ++bus) {
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for (devfn = 0; devfn < 0xff; ++devfn) {
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if (PCI_FUNC (devfn) == 0)
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pcibios_read_config_byte(bus, devfn, PCI_HEADER_TYPE, &hdr_type);
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else if (!(hdr_type & 0x80)) /* not a multi-function device */
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continue;
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pcibios_read_config_dword(bus, devfn, PCI_VENDOR_ID, &l);
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/* some broken boards return 0 if a slot is empty: */
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if (l == 0xffffffff || l == 0x00000000) {
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hdr_type = 0;
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continue;
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}
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vendor = l & 0xffff;
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device = (l >> 16) & 0xffff;
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#if DEBUG
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printf("bus %hhX, function %hhX, vendor %hX, device %hX\n",
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bus, devfn, vendor, device);
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#endif
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for (i = 0; pcidev[i].vendor != 0; i++) {
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if (vendor != pcidev[i].vendor
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|| device != pcidev[i].dev_id)
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continue;
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pcidev[i].devfn = devfn;
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pcidev[i].bus = bus;
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for (reg = PCI_BASE_ADDRESS_0; reg <= PCI_BASE_ADDRESS_5; reg += 4) {
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pcibios_read_config_dword(bus, devfn, reg, &ioaddr);
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if ((ioaddr & PCI_BASE_ADDRESS_IO_MASK) == 0 || (ioaddr & PCI_BASE_ADDRESS_SPACE_IO) == 0)
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continue;
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/* Strip the I/O address out of the returned value */
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ioaddr &= PCI_BASE_ADDRESS_IO_MASK;
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/* Get the memory base address */
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pcibios_read_config_dword(bus, devfn,
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PCI_BASE_ADDRESS_1, &membase);
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|
/* Get the ROM base address */
|
|
pcibios_read_config_dword(bus, devfn, PCI_ROM_ADDRESS, &romaddr);
|
|
romaddr >>= 10;
|
|
printf("Found %s at %#hx, ROM address %#hx\n",
|
|
pcidev[i].name, ioaddr, romaddr);
|
|
/* Take the first one or the one that matches in boot ROM address */
|
|
if (pci_ioaddr == 0 || romaddr == ((unsigned long) rom.rom_segment << 4)) {
|
|
pcidev[i].membase = membase;
|
|
pcidev[i].ioaddr = ioaddr;
|
|
return;
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
}
|
|
|
|
void eth_pci_init(struct pci_device *pcidev)
|
|
{
|
|
#ifndef CONFIG_PCI_DIRECT
|
|
pcibios_init();
|
|
if (!pcibios_entry) {
|
|
printf("pci_init: no BIOS32 detected\n");
|
|
return;
|
|
}
|
|
#endif
|
|
scan_bus(pcidev);
|
|
/* return values are in pcidev structures */
|
|
}
|
|
|
|
/*
|
|
* Set device to be a busmaster in case BIOS neglected to do so.
|
|
* Also adjust PCI latency timer to a reasonable value, 32.
|
|
*/
|
|
void adjust_pci_device(struct pci_device *p)
|
|
{
|
|
unsigned short new_command, pci_command;
|
|
unsigned char pci_latency;
|
|
|
|
pcibios_read_config_word(p->bus, p->devfn, PCI_COMMAND, &pci_command);
|
|
new_command = pci_command | PCI_COMMAND_MASTER|PCI_COMMAND_IO;
|
|
if (pci_command != new_command) {
|
|
printf("The PCI BIOS has not enabled this device!\nUpdating PCI command %hX->%hX. pci_bus %hhX pci_device_fn %hhX\n",
|
|
pci_command, new_command, p->bus, p->devfn);
|
|
pcibios_write_config_word(p->bus, p->devfn, PCI_COMMAND, new_command);
|
|
}
|
|
pcibios_read_config_byte(p->bus, p->devfn, PCI_LATENCY_TIMER, &pci_latency);
|
|
if (pci_latency < 32) {
|
|
printf("PCI latency timer (CFLT) is unreasonably low at %d. Setting to 32 clocks.\n", pci_latency);
|
|
pcibios_write_config_byte(p->bus, p->devfn, PCI_LATENCY_TIMER, 32);
|
|
}
|
|
}
|