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685 lines
26 KiB
C
685 lines
26 KiB
C
/* Etherboot: depca.h merged, comments from Linux driver retained */
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/* depca.c: A DIGITAL DEPCA & EtherWORKS ethernet driver for linux.
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Written 1994, 1995 by David C. Davies.
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Copyright 1994 David C. Davies
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and
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United States Government
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(as represented by the Director, National Security Agency).
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Copyright 1995 Digital Equipment Corporation.
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This software may be used and distributed according to the terms of
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the GNU Public License, incorporated herein by reference.
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This driver is written for the Digital Equipment Corporation series
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of DEPCA and EtherWORKS ethernet cards:
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DEPCA (the original)
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DE100
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DE101
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DE200 Turbo
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DE201 Turbo
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DE202 Turbo (TP BNC)
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DE210
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DE422 (EISA)
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The driver has been tested on DE100, DE200 and DE202 cards in a
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relatively busy network. The DE422 has been tested a little.
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This driver will NOT work for the DE203, DE204 and DE205 series of
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cards, since they have a new custom ASIC in place of the AMD LANCE
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chip. See the 'ewrk3.c' driver in the Linux source tree for running
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those cards.
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I have benchmarked the driver with a DE100 at 595kB/s to (542kB/s from)
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a DECstation 5000/200.
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The author may be reached at davies@maniac.ultranet.com
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=========================================================================
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The driver was originally based on the 'lance.c' driver from Donald
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Becker which is included with the standard driver distribution for
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linux. V0.4 is a complete re-write with only the kernel interface
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remaining from the original code.
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1) Lance.c code in /linux/drivers/net/
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2) "Ethernet/IEEE 802.3 Family. 1992 World Network Data Book/Handbook",
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AMD, 1992 [(800) 222-9323].
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3) "Am79C90 CMOS Local Area Network Controller for Ethernet (C-LANCE)",
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AMD, Pub. #17881, May 1993.
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4) "Am79C960 PCnet-ISA(tm), Single-Chip Ethernet Controller for ISA",
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AMD, Pub. #16907, May 1992
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5) "DEC EtherWORKS LC Ethernet Controller Owners Manual",
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Digital Equipment corporation, 1990, Pub. #EK-DE100-OM.003
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6) "DEC EtherWORKS Turbo Ethernet Controller Owners Manual",
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Digital Equipment corporation, 1990, Pub. #EK-DE200-OM.003
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7) "DEPCA Hardware Reference Manual", Pub. #EK-DEPCA-PR
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Digital Equipment Corporation, 1989
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8) "DEC EtherWORKS Turbo_(TP BNC) Ethernet Controller Owners Manual",
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Digital Equipment corporation, 1991, Pub. #EK-DE202-OM.001
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Peter Bauer's depca.c (V0.5) was referred to when debugging V0.1 of this
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driver.
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The original DEPCA card requires that the ethernet ROM address counter
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be enabled to count and has an 8 bit NICSR. The ROM counter enabling is
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only done when a 0x08 is read as the first address octet (to minimise
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the chances of writing over some other hardware's I/O register). The
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NICSR accesses have been changed to byte accesses for all the cards
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supported by this driver, since there is only one useful bit in the MSB
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(remote boot timeout) and it is not used. Also, there is a maximum of
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only 48kB network RAM for this card. My thanks to Torbjorn Lindh for
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help debugging all this (and holding my feet to the fire until I got it
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right).
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The DE200 series boards have on-board 64kB RAM for use as a shared
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memory network buffer. Only the DE100 cards make use of a 2kB buffer
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mode which has not been implemented in this driver (only the 32kB and
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64kB modes are supported [16kB/48kB for the original DEPCA]).
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At the most only 2 DEPCA cards can be supported on the ISA bus because
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there is only provision for two I/O base addresses on each card (0x300
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and 0x200). The I/O address is detected by searching for a byte sequence
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in the Ethernet station address PROM at the expected I/O address for the
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Ethernet PROM. The shared memory base address is 'autoprobed' by
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looking for the self test PROM and detecting the card name. When a
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second DEPCA is detected, information is placed in the base_addr
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variable of the next device structure (which is created if necessary),
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thus enabling ethif_probe initialization for the device. More than 2
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EISA cards can be supported, but care will be needed assigning the
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shared memory to ensure that each slot has the correct IRQ, I/O address
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and shared memory address assigned.
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************************************************************************
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NOTE: If you are using two ISA DEPCAs, it is important that you assign
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the base memory addresses correctly. The driver autoprobes I/O 0x300
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then 0x200. The base memory address for the first device must be less
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than that of the second so that the auto probe will correctly assign the
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I/O and memory addresses on the same card. I can't think of a way to do
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this unambiguously at the moment, since there is nothing on the cards to
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tie I/O and memory information together.
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I am unable to test 2 cards together for now, so this code is
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unchecked. All reports, good or bad, are welcome.
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************************************************************************
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The board IRQ setting must be at an unused IRQ which is auto-probed
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using Donald Becker's autoprobe routines. DEPCA and DE100 board IRQs are
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{2,3,4,5,7}, whereas the DE200 is at {5,9,10,11,15}. Note that IRQ2 is
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really IRQ9 in machines with 16 IRQ lines.
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No 16MB memory limitation should exist with this driver as DMA is not
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used and the common memory area is in low memory on the network card (my
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current system has 20MB and I've not had problems yet).
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The ability to load this driver as a loadable module has been added. To
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utilise this ability, you have to do <8 things:
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0) have a copy of the loadable modules code installed on your system.
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1) copy depca.c from the /linux/drivers/net directory to your favourite
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temporary directory.
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2) if you wish, edit the source code near line 1530 to reflect the I/O
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address and IRQ you're using (see also 5).
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3) compile depca.c, but include -DMODULE in the command line to ensure
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that the correct bits are compiled (see end of source code).
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4) if you are wanting to add a new card, goto 5. Otherwise, recompile a
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kernel with the depca configuration turned off and reboot.
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5) insmod depca.o [irq=7] [io=0x200] [mem=0xd0000] [adapter_name=DE100]
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[Alan Cox: Changed the code to allow command line irq/io assignments]
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[Dave Davies: Changed the code to allow command line mem/name
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assignments]
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6) run the net startup bits for your eth?? interface manually
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(usually /etc/rc.inet[12] at boot time).
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7) enjoy!
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Note that autoprobing is not allowed in loadable modules - the system is
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already up and running and you're messing with interrupts.
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To unload a module, turn off the associated interface
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'ifconfig eth?? down' then 'rmmod depca'.
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To assign a base memory address for the shared memory when running as a
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loadable module, see 5 above. To include the adapter name (if you have
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no PROM but know the card name) also see 5 above. Note that this last
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option will not work with kernel built-in depca's.
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The shared memory assignment for a loadable module makes sense to avoid
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the 'memory autoprobe' picking the wrong shared memory (for the case of
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2 depca's in a PC).
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************************************************************************
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Support for MCA EtherWORKS cards added 11-3-98.
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Verified to work with up to 2 DE212 cards in a system (although not
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fully stress-tested).
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Currently known bugs/limitations:
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Note: with the MCA stuff as a module, it trusts the MCA configuration,
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not the command line for IRQ and memory address. You can
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specify them if you want, but it will throw your values out.
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You still have to pass the IO address it was configured as
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though.
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************************************************************************
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TO DO:
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------
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Revision History
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----------------
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Version Date Description
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0.1 25-jan-94 Initial writing.
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0.2 27-jan-94 Added LANCE TX hardware buffer chaining.
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0.3 1-feb-94 Added multiple DEPCA support.
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0.31 4-feb-94 Added DE202 recognition.
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0.32 19-feb-94 Tidy up. Improve multi-DEPCA support.
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0.33 25-feb-94 Fix DEPCA ethernet ROM counter enable.
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Add jabber packet fix from murf@perftech.com
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and becker@super.org
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0.34 7-mar-94 Fix DEPCA max network memory RAM & NICSR access.
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0.35 8-mar-94 Added DE201 recognition. Tidied up.
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0.351 30-apr-94 Added EISA support. Added DE422 recognition.
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0.36 16-may-94 DE422 fix released.
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0.37 22-jul-94 Added MODULE support
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0.38 15-aug-94 Added DBR ROM switch in depca_close().
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Multi DEPCA bug fix.
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0.38axp 15-sep-94 Special version for Alpha AXP Linux V1.0.
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0.381 12-dec-94 Added DE101 recognition, fix multicast bug.
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0.382 9-feb-95 Fix recognition bug reported by <bkm@star.rl.ac.uk>.
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0.383 22-feb-95 Fix for conflict with VESA SCSI reported by
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<stromain@alf.dec.com>
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0.384 17-mar-95 Fix a ring full bug reported by <bkm@star.rl.ac.uk>
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0.385 3-apr-95 Fix a recognition bug reported by
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<ryan.niemi@lastfrontier.com>
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0.386 21-apr-95 Fix the last fix...sorry, must be galloping senility
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0.40 25-May-95 Rewrite for portability & updated.
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ALPHA support from <jestabro@amt.tay1.dec.com>
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0.41 26-Jun-95 Added verify_area() calls in depca_ioctl() from
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suggestion by <heiko@colossus.escape.de>
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0.42 27-Dec-95 Add 'mem' shared memory assignment for loadable
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modules.
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Add 'adapter_name' for loadable modules when no PROM.
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Both above from a suggestion by
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<pchen@woodruffs121.residence.gatech.edu>.
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Add new multicasting code.
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0.421 22-Apr-96 Fix alloc_device() bug <jari@markkus2.fimr.fi>
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0.422 29-Apr-96 Fix depca_hw_init() bug <jari@markkus2.fimr.fi>
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0.423 7-Jun-96 Fix module load bug <kmg@barco.be>
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0.43 16-Aug-96 Update alloc_device() to conform to de4x5.c
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0.44 1-Sep-97 Fix *_probe() to test check_region() first - bug
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reported by <mmogilvi@elbert.uccs.edu>
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0.45 3-Nov-98 Added support for MCA EtherWORKS (DE210/DE212) cards
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by <tymm@computer.org>
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0.451 5-Nov-98 Fixed mca stuff cuz I'm a dummy. <tymm@computer.org>
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0.5 14-Nov-98 Re-spin for 2.1.x kernels.
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0.51 27-Jun-99 Correct received packet length for CRC from
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report by <worm@dkik.dk>
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=========================================================================
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*/
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#include "etherboot.h"
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#include "nic.h"
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#include "cards.h"
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/*
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** I/O addresses. Note that the 2k buffer option is not supported in
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** this driver.
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*/
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#define DEPCA_NICSR ioaddr+0x00 /* Network interface CSR */
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#define DEPCA_RBI ioaddr+0x02 /* RAM buffer index (2k buffer mode) */
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#define DEPCA_DATA ioaddr+0x04 /* LANCE registers' data port */
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#define DEPCA_ADDR ioaddr+0x06 /* LANCE registers' address port */
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#define DEPCA_HBASE ioaddr+0x08 /* EISA high memory base address reg. */
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#define DEPCA_PROM ioaddr+0x0c /* Ethernet address ROM data port */
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#define DEPCA_CNFG ioaddr+0x0c /* EISA Configuration port */
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#define DEPCA_RBSA ioaddr+0x0e /* RAM buffer starting address (2k buff.) */
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/*
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** These are LANCE registers addressable through DEPCA_ADDR
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*/
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#define CSR0 0
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#define CSR1 1
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#define CSR2 2
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#define CSR3 3
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/*
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** NETWORK INTERFACE CSR (NI_CSR) bit definitions
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*/
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#define TO 0x0100 /* Time Out for remote boot */
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#define SHE 0x0080 /* SHadow memory Enable */
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#define BS 0x0040 /* Bank Select */
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#define BUF 0x0020 /* BUFfer size (1->32k, 0->64k) */
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#define RBE 0x0010 /* Remote Boot Enable (1->net boot) */
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#define AAC 0x0008 /* Address ROM Address Counter (1->enable) */
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#define _128KB 0x0008 /* 128kB Network RAM (1->enable) */
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#define IM 0x0004 /* Interrupt Mask (1->mask) */
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#define IEN 0x0002 /* Interrupt tristate ENable (1->enable) */
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#define LED 0x0001 /* LED control */
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/*
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** Control and Status Register 0 (CSR0) bit definitions
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*/
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#define ERR 0x8000 /* Error summary */
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#define BABL 0x4000 /* Babble transmitter timeout error */
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#define CERR 0x2000 /* Collision Error */
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#define MISS 0x1000 /* Missed packet */
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#define MERR 0x0800 /* Memory Error */
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#define RINT 0x0400 /* Receiver Interrupt */
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#define TINT 0x0200 /* Transmit Interrupt */
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#define IDON 0x0100 /* Initialization Done */
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#define INTR 0x0080 /* Interrupt Flag */
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#define INEA 0x0040 /* Interrupt Enable */
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#define RXON 0x0020 /* Receiver on */
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#define TXON 0x0010 /* Transmitter on */
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#define TDMD 0x0008 /* Transmit Demand */
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#define STOP 0x0004 /* Stop */
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#define STRT 0x0002 /* Start */
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#define INIT 0x0001 /* Initialize */
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#define INTM 0xff00 /* Interrupt Mask */
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#define INTE 0xfff0 /* Interrupt Enable */
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/*
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** CONTROL AND STATUS REGISTER 3 (CSR3)
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*/
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#define BSWP 0x0004 /* Byte SWaP */
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#define ACON 0x0002 /* ALE control */
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#define BCON 0x0001 /* Byte CONtrol */
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/*
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** Initialization Block Mode Register
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*/
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#define PROM 0x8000 /* Promiscuous Mode */
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#define EMBA 0x0080 /* Enable Modified Back-off Algorithm */
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#define INTL 0x0040 /* Internal Loopback */
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#define DRTY 0x0020 /* Disable Retry */
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#define COLL 0x0010 /* Force Collision */
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#define DTCR 0x0008 /* Disable Transmit CRC */
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#define LOOP 0x0004 /* Loopback */
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#define DTX 0x0002 /* Disable the Transmitter */
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#define DRX 0x0001 /* Disable the Receiver */
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/*
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** Receive Message Descriptor 1 (RMD1) bit definitions.
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*/
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#define R_OWN 0x80000000 /* Owner bit 0 = host, 1 = lance */
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#define R_ERR 0x4000 /* Error Summary */
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#define R_FRAM 0x2000 /* Framing Error */
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#define R_OFLO 0x1000 /* Overflow Error */
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#define R_CRC 0x0800 /* CRC Error */
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#define R_BUFF 0x0400 /* Buffer Error */
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#define R_STP 0x0200 /* Start of Packet */
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#define R_ENP 0x0100 /* End of Packet */
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/*
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** Transmit Message Descriptor 1 (TMD1) bit definitions.
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*/
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#define T_OWN 0x80000000 /* Owner bit 0 = host, 1 = lance */
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#define T_ERR 0x4000 /* Error Summary */
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#define T_ADD_FCS 0x2000 /* More the 1 retry needed to Xmit */
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#define T_MORE 0x1000 /* >1 retry to transmit packet */
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#define T_ONE 0x0800 /* 1 try needed to transmit the packet */
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#define T_DEF 0x0400 /* Deferred */
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#define T_STP 0x02000000 /* Start of Packet */
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#define T_ENP 0x01000000 /* End of Packet */
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#define T_FLAGS 0xff000000 /* TX Flags Field */
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/*
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** Transmit Message Descriptor 3 (TMD3) bit definitions.
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*/
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#define TMD3_BUFF 0x8000 /* BUFFer error */
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#define TMD3_UFLO 0x4000 /* UnderFLOw error */
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#define TMD3_RES 0x2000 /* REServed */
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#define TMD3_LCOL 0x1000 /* Late COLlision */
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#define TMD3_LCAR 0x0800 /* Loss of CARrier */
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#define TMD3_RTRY 0x0400 /* ReTRY error */
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/*
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** EISA configuration Register (CNFG) bit definitions
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*/
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#define TIMEO 0x0100 /* 0:2.5 mins, 1: 30 secs */
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#define REMOTE 0x0080 /* Remote Boot Enable -> 1 */
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#define IRQ11 0x0040 /* Enable -> 1 */
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#define IRQ10 0x0020 /* Enable -> 1 */
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#define IRQ9 0x0010 /* Enable -> 1 */
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#define IRQ5 0x0008 /* Enable -> 1 */
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#define BUFF 0x0004 /* 0: 64kB or 128kB, 1: 32kB */
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#define PADR16 0x0002 /* RAM on 64kB boundary */
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#define PADR17 0x0001 /* RAM on 128kB boundary */
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/*
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** Miscellaneous
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*/
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#define HASH_TABLE_LEN 64 /* Bits */
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#define HASH_BITS 0x003f /* 6 LS bits */
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#define MASK_INTERRUPTS 1
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#define UNMASK_INTERRUPTS 0
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#define EISA_EN 0x0001 /* Enable EISA bus buffers */
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#define EISA_ID iobase+0x0080 /* ID long word for EISA card */
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#define EISA_CTRL iobase+0x0084 /* Control word for EISA card */
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/*
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** Recognised commands for the driver
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*/
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#define DEPCA_GET_HWADDR 0x01 /* Get the hardware address */
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#define DEPCA_SET_HWADDR 0x02 /* Get the hardware address */
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#define DEPCA_SET_PROM 0x03 /* Set Promiscuous Mode */
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#define DEPCA_CLR_PROM 0x04 /* Clear Promiscuous Mode */
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#define DEPCA_SAY_BOO 0x05 /* Say "Boo!" to the kernel log file */
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#define DEPCA_GET_MCA 0x06 /* Get a multicast address */
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#define DEPCA_SET_MCA 0x07 /* Set a multicast address */
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#define DEPCA_CLR_MCA 0x08 /* Clear a multicast address */
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#define DEPCA_MCA_EN 0x09 /* Enable a multicast address group */
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#define DEPCA_GET_STATS 0x0a /* Get the driver statistics */
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#define DEPCA_CLR_STATS 0x0b /* Zero out the driver statistics */
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#define DEPCA_GET_REG 0x0c /* Get the Register contents */
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#define DEPCA_SET_REG 0x0d /* Set the Register contents */
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#define DEPCA_DUMP 0x0f /* Dump the DEPCA Status */
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#ifdef DEPCA_DEBUG
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static int depca_debug = DEPCA_DEBUG;
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#else
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static int depca_debug = 1;
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#endif
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#define DEPCA_NDA 0xffe0 /* No Device Address */
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/*
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** Ethernet PROM defines
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*/
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#define PROBE_LENGTH 32
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/*
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** Set the number of Tx and Rx buffers. Ensure that the memory requested
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** here is <= to the amount of shared memory set up by the board switches.
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** The number of descriptors MUST BE A POWER OF 2.
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**
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** total_memory = NUM_RX_DESC*(8+RX_BUFF_SZ) + NUM_TX_DESC*(8+TX_BUFF_SZ)
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*/
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#define NUM_RX_DESC 8 /* Number of RX descriptors */
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#define NUM_TX_DESC 8 /* Number of TX descriptors */
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#define RX_BUFF_SZ 1536 /* Buffer size for each Rx buffer */
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#define TX_BUFF_SZ 1536 /* Buffer size for each Tx buffer */
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#define CRC_POLYNOMIAL_BE 0x04c11db7UL /* Ethernet CRC, big endian */
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#define CRC_POLYNOMIAL_LE 0xedb88320UL /* Ethernet CRC, little endian */
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/*
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** ISA Bus defines
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*/
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#define DEPCA_IO_PORTS {0x300, 0x200, 0}
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#ifndef DEPCA_MODEL
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#define DEPCA_MODEL DEPCA
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#endif
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static enum {
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DEPCA, DE100, DE101, DE200, DE201, DE202, DE210, DE212, DE422, unknown
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} adapter = DEPCA_MODEL;
|
|
|
|
/*
|
|
** Name <-> Adapter mapping
|
|
*/
|
|
|
|
static char *adapter_name[] = {
|
|
"DEPCA",
|
|
"DE100","DE101",
|
|
"DE200","DE201","DE202",
|
|
"DE210","DE212",
|
|
"DE422",
|
|
""
|
|
};
|
|
|
|
#ifndef DEPCA_RAM_BASE
|
|
#define DEPCA_RAM_BASE 0xd0000
|
|
#endif
|
|
|
|
/*
|
|
** Memory Alignment. Each descriptor is 4 longwords long. To force a
|
|
** particular alignment on the TX descriptor, adjust DESC_SKIP_LEN and
|
|
** DESC_ALIGN. ALIGN aligns the start address of the private memory area
|
|
** and hence the RX descriptor ring's first entry.
|
|
*/
|
|
#define ALIGN4 ((u32)4 - 1) /* 1 longword align */
|
|
#define ALIGN8 ((u32)8 - 1) /* 2 longword (quadword) align */
|
|
#define ALIGN ALIGN8 /* Keep the LANCE happy... */
|
|
|
|
typedef long s32;
|
|
typedef unsigned long u32;
|
|
typedef short s16;
|
|
typedef unsigned short u16;
|
|
typedef char s8;
|
|
typedef unsigned char u8;
|
|
|
|
/*
|
|
** The DEPCA Rx and Tx ring descriptors.
|
|
*/
|
|
struct depca_rx_desc {
|
|
volatile s32 base;
|
|
s16 buf_length; /* This length is negative 2's complement! */
|
|
s16 msg_length; /* This length is "normal". */
|
|
};
|
|
|
|
struct depca_tx_desc {
|
|
volatile s32 base;
|
|
s16 length; /* This length is negative 2's complement! */
|
|
s16 misc; /* Errors and TDR info */
|
|
};
|
|
|
|
#define LA_MASK 0x0000ffff /* LANCE address mask for mapping network RAM
|
|
to LANCE memory address space */
|
|
|
|
/*
|
|
** The Lance initialization block, described in databook, in common memory.
|
|
*/
|
|
struct depca_init {
|
|
u16 mode; /* Mode register */
|
|
u8 phys_addr[ETHER_ADDR_SIZE]; /* Physical ethernet address */
|
|
u8 mcast_table[8]; /* Multicast Hash Table. */
|
|
u32 rx_ring; /* Rx ring base pointer & ring length */
|
|
u32 tx_ring; /* Tx ring base pointer & ring length */
|
|
};
|
|
|
|
/*
|
|
** The transmit ring full condition is described by the tx_old and tx_new
|
|
** pointers by:
|
|
** tx_old = tx_new Empty ring
|
|
** tx_old = tx_new+1 Full ring
|
|
** tx_old+txRingMask = tx_new Full ring (wrapped condition)
|
|
*/
|
|
#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
|
|
lp->tx_old+lp->txRingMask-lp->tx_new:\
|
|
lp->tx_old -lp->tx_new-1)
|
|
|
|
static Address mem_start = DEPCA_RAM_BASE;
|
|
static unsigned short ioaddr = 0;
|
|
|
|
/*
|
|
** Miscellaneous defines...
|
|
*/
|
|
#define STOP_DEPCA \
|
|
outw(CSR0, DEPCA_ADDR);\
|
|
outw(STOP, DEPCA_DATA)
|
|
|
|
|
|
|
|
/**************************************************************************
|
|
RESET - Reset adapter
|
|
***************************************************************************/
|
|
static void depca_reset(struct nic *nic)
|
|
{
|
|
s16 nicsr;
|
|
int status = 0;
|
|
|
|
STOP_DEPCA;
|
|
nicsr = inb(DEPCA_NICSR);
|
|
|
|
/* non-DEPCA need this */
|
|
if (adapter != DEPCA)
|
|
outb(nicsr | SHE, DEPCA_NICSR);
|
|
|
|
}
|
|
|
|
/**************************************************************************
|
|
POLL - Wait for a frame
|
|
***************************************************************************/
|
|
static int depca_poll(struct nic *nic)
|
|
{
|
|
/* return true if there's an ethernet packet ready to read */
|
|
/* nic->packet should contain data on return */
|
|
/* nic->packetlen should contain length of data */
|
|
return 0;
|
|
}
|
|
|
|
/**************************************************************************
|
|
TRANSMIT - Transmit a frame
|
|
***************************************************************************/
|
|
static void depca_transmit(
|
|
struct nic *nic,
|
|
const char *d, /* Destination */
|
|
unsigned int t, /* Type */
|
|
unsigned int s, /* size */
|
|
const char *p) /* Packet */
|
|
{
|
|
/* send the packet to destination */
|
|
}
|
|
|
|
/**************************************************************************
|
|
DISABLE - Turn off ethernet interface
|
|
***************************************************************************/
|
|
static void depca_disable(struct nic *nic)
|
|
{
|
|
}
|
|
|
|
/*
|
|
** Look for a special sequence in the Ethernet station address PROM that
|
|
** is common across all DEPCA products. Note that the original DEPCA needs
|
|
** its ROM address counter to be initialized and enabled. Only enable
|
|
** if the first address octet is a 0x08 - this minimises the chances of
|
|
** messing around with some other hardware, but it assumes that this DEPCA
|
|
** card initialized itself correctly.
|
|
**
|
|
** Search the Ethernet address ROM for the signature. Since the ROM address
|
|
** counter can start at an arbitrary point, the search must include the entire
|
|
** probe sequence length plus the (length_of_the_signature - 1).
|
|
** Stop the search IMMEDIATELY after the signature is found so that the
|
|
** PROM address counter is correctly positioned at the start of the
|
|
** ethernet address for later read out.
|
|
*/
|
|
static int depca_probe1(struct nic *nic)
|
|
{
|
|
u8 data, nicsr;
|
|
/* This is only correct for little endian machines, but then
|
|
Etherboot doesn't work on anything but a PC */
|
|
u8 sig[] = { 0xFF, 0x00, 0x55, 0xAA, 0xFF, 0x00, 0x55, 0xAA };
|
|
int i, j;
|
|
long sum, chksum;
|
|
Address mem_len, offset;
|
|
|
|
data = inb(DEPCA_PROM); /* clear counter on DEPCA */
|
|
data = inb(DEPCA_PROM); /* read data */
|
|
if (data == 0x8) {
|
|
nicsr = inb(DEPCA_NICSR);
|
|
nicsr |= AAC;
|
|
outb(nicsr, DEPCA_NICSR);
|
|
}
|
|
for (i = 0, j = 0; j < (int)sizeof(sig) && i < PROBE_LENGTH+((int)sizeof(sig))-1; ++i) {
|
|
data = inb(DEPCA_PROM);
|
|
if (data == sig[j]) /* track signature */
|
|
++j;
|
|
else
|
|
j = (data == sig[0]) ? 1 : 0;
|
|
}
|
|
if (j != sizeof(sig))
|
|
return (0);
|
|
/* put the card in its initial state */
|
|
STOP_DEPCA;
|
|
nicsr = ((inb(DEPCA_NICSR) & ~SHE & ~RBE & ~IEN) | IM);
|
|
outb(nicsr, DEPCA_NICSR);
|
|
if (inw(DEPCA_DATA) != STOP)
|
|
return (0);
|
|
memcpy((char *)mem_start, sig, sizeof(sig));
|
|
if (memcmp((char *)mem_start, sig, sizeof(sig)) != 0)
|
|
return (0);
|
|
for (i = 0, j = 0, sum = 0; j < 3; j++) {
|
|
sum <<= 1;
|
|
if (sum > 0xFFFF)
|
|
sum -= 0xFFFF;
|
|
sum += (u8)(nic->node_addr[i++] = inb(DEPCA_PROM));
|
|
sum += (u16)((nic->node_addr[i++] = inb(DEPCA_PROM)) << 8);
|
|
if (sum > 0xFFFF)
|
|
sum -= 0xFFFF;
|
|
}
|
|
if (sum == 0xFFFF)
|
|
sum = 0;
|
|
chksum = (u8)inb(DEPCA_PROM);
|
|
chksum |= (u16)(inb(DEPCA_PROM) << 8);
|
|
mem_len = (adapter == DEPCA) ? (48 << 10) : (64 << 10);
|
|
offset = 0;
|
|
if (nicsr & BUF) {
|
|
offset = 0x8000;
|
|
nicsr &= ~BS;
|
|
mem_len -= (32 << 10);
|
|
}
|
|
if (adapter != DEPCA)
|
|
outb(nicsr |= SHE, DEPCA_NICSR);
|
|
printf("%s base 0x%x, memory [0x%X-0x%X], addr ", adapter_name[adapter],
|
|
ioaddr, mem_start, mem_start + mem_len);
|
|
for (i = 0; i < ETHER_ADDR_SIZE; i++) {
|
|
if (i != 0)
|
|
putchar(':');
|
|
printf("%b", nic->node_addr[i]);
|
|
}
|
|
if (sum != chksum)
|
|
printf(" (bad checksum)");
|
|
printf("\n");
|
|
return (1);
|
|
}
|
|
|
|
/**************************************************************************
|
|
PROBE - Look for an adapter, this routine's visible to the outside
|
|
***************************************************************************/
|
|
struct nic *depca_probe(struct nic *nic, unsigned short *probe_addrs)
|
|
{
|
|
static unsigned short base[] = DEPCA_IO_PORTS;
|
|
int i;
|
|
|
|
printf("DEPCA driver not fully functional, only probe working...\n");
|
|
if (probe_addrs == 0 || probe_addrs[0] == 0)
|
|
probe_addrs = base; /* Use defaults */
|
|
for (i = 0; (ioaddr = base[i]) != 0; ++i) {
|
|
if (depca_probe1(nic))
|
|
break;
|
|
}
|
|
if (ioaddr != 0) {
|
|
depca_reset(nic);
|
|
/* point to NIC specific routines */
|
|
nic->reset = depca_reset;
|
|
nic->poll = depca_poll;
|
|
nic->transmit = depca_transmit;
|
|
nic->disable = depca_disable;
|
|
return nic;
|
|
}
|
|
return 0;
|
|
}
|