mirror of
https://git.savannah.gnu.org/git/grub.git
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Vladimir Serbinenko
3312af6e07
We currently use an old version of libgcrypt which results in us having fewer ciphers and missing on many other improvements. Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-by: Daniel Kiper <daniel.kiper@oracle.com>
974 lines
26 KiB
ArmAsm
974 lines
26 KiB
ArmAsm
/* sm4-avx2-amd64.S - AVX2 implementation of SM4 cipher
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*
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* Copyright (C) 2020, 2022-2023 Jussi Kivilinna <jussi.kivilinna@iki.fi>
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*
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* This file is part of Libgcrypt.
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*
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* Libgcrypt is free software; you can redistribute it and/or modify
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* it under the terms of the GNU Lesser General Public License as
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* published by the Free Software Foundation; either version 2.1 of
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* the License, or (at your option) any later version.
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*
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* Libgcrypt is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this program; if not, see <http://www.gnu.org/licenses/>.
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*/
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/* Based on SM4 AES-NI work by Markku-Juhani O. Saarinen at:
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* https://github.com/mjosaarinen/sm4ni
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*/
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#include <config.h>
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#ifdef __x86_64
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#if (defined(HAVE_COMPATIBLE_GCC_AMD64_PLATFORM_AS) || \
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defined(HAVE_COMPATIBLE_GCC_WIN64_PLATFORM_AS)) && \
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defined(ENABLE_AESNI_SUPPORT) && defined(ENABLE_AVX2_SUPPORT)
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#include "asm-common-amd64.h"
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/* vector registers */
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#define RX0 %ymm0
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#define RX1 %ymm1
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#define MASK_4BIT %ymm2
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#define RTMP0 %ymm3
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#define RTMP1 %ymm4
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#define RTMP2 %ymm5
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#define RTMP3 %ymm6
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#define RTMP4 %ymm7
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#define RA0 %ymm8
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#define RA1 %ymm9
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#define RA2 %ymm10
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#define RA3 %ymm11
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#define RA0x %xmm8
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#define RA1x %xmm9
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#define RA2x %xmm10
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#define RA3x %xmm11
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#define RB0 %ymm12
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#define RB1 %ymm13
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#define RB2 %ymm14
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#define RB3 %ymm15
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#define RB0x %xmm12
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#define RB1x %xmm13
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#define RB2x %xmm14
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#define RB3x %xmm15
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#define RNOT %ymm0
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#define RBSWAP %ymm1
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#define RX0x %xmm0
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#define RX1x %xmm1
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#define MASK_4BITx %xmm2
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#define RNOTx %xmm0
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#define RBSWAPx %xmm1
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#define RTMP0x %xmm3
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#define RTMP1x %xmm4
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#define RTMP2x %xmm5
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#define RTMP3x %xmm6
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#define RTMP4x %xmm7
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/**********************************************************************
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helper macros
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**********************************************************************/
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/* Transpose four 32-bit words between 128-bit vector lanes. */
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#define transpose_4x4(x0, x1, x2, x3, t1, t2) \
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vpunpckhdq x1, x0, t2; \
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vpunpckldq x1, x0, x0; \
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\
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vpunpckldq x3, x2, t1; \
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vpunpckhdq x3, x2, x2; \
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\
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vpunpckhqdq t1, x0, x1; \
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vpunpcklqdq t1, x0, x0; \
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\
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vpunpckhqdq x2, t2, x3; \
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vpunpcklqdq x2, t2, x2;
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/* post-SubByte transform. */
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#define transform_pre(x, lo_t, hi_t, mask4bit, tmp0) \
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vpand x, mask4bit, tmp0; \
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vpandn x, mask4bit, x; \
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vpsrld $4, x, x; \
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\
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vpshufb tmp0, lo_t, tmp0; \
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vpshufb x, hi_t, x; \
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vpxor tmp0, x, x;
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/* post-SubByte transform. Note: x has been XOR'ed with mask4bit by
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* 'vaeslastenc' instruction. */
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#define transform_post(x, lo_t, hi_t, mask4bit, tmp0) \
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vpandn mask4bit, x, tmp0; \
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vpsrld $4, x, x; \
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vpand x, mask4bit, x; \
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\
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vpshufb tmp0, lo_t, tmp0; \
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vpshufb x, hi_t, x; \
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vpxor tmp0, x, x;
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/**********************************************************************
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16-way SM4 with AES-NI and AVX
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**********************************************************************/
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SECTION_RODATA
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.align 16
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ELF(.type _sm4_aesni_avx2_consts,@object)
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_sm4_aesni_avx2_consts:
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/*
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* Following four affine transform look-up tables are from work by
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* Markku-Juhani O. Saarinen, at https://github.com/mjosaarinen/sm4ni
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*
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* These allow exposing SM4 S-Box from AES SubByte.
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*/
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/* pre-SubByte affine transform, from SM4 field to AES field. */
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.Lpre_tf_lo_s:
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.quad 0x9197E2E474720701, 0xC7C1B4B222245157
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.Lpre_tf_hi_s:
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.quad 0xE240AB09EB49A200, 0xF052B91BF95BB012
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/* post-SubByte affine transform, from AES field to SM4 field. */
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.Lpost_tf_lo_s:
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.quad 0x5B67F2CEA19D0834, 0xEDD14478172BBE82
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.Lpost_tf_hi_s:
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.quad 0xAE7201DD73AFDC00, 0x11CDBE62CC1063BF
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/* For isolating SubBytes from AESENCLAST, inverse shift row */
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.Linv_shift_row:
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.byte 0x00, 0x0d, 0x0a, 0x07, 0x04, 0x01, 0x0e, 0x0b
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.byte 0x08, 0x05, 0x02, 0x0f, 0x0c, 0x09, 0x06, 0x03
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/* Inverse shift row + Rotate left by 8 bits on 32-bit words with vpshufb */
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.Linv_shift_row_rol_8:
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.byte 0x07, 0x00, 0x0d, 0x0a, 0x0b, 0x04, 0x01, 0x0e
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.byte 0x0f, 0x08, 0x05, 0x02, 0x03, 0x0c, 0x09, 0x06
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/* Inverse shift row + Rotate left by 16 bits on 32-bit words with vpshufb */
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.Linv_shift_row_rol_16:
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.byte 0x0a, 0x07, 0x00, 0x0d, 0x0e, 0x0b, 0x04, 0x01
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.byte 0x02, 0x0f, 0x08, 0x05, 0x06, 0x03, 0x0c, 0x09
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/* Inverse shift row + Rotate left by 24 bits on 32-bit words with vpshufb */
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.Linv_shift_row_rol_24:
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.byte 0x0d, 0x0a, 0x07, 0x00, 0x01, 0x0e, 0x0b, 0x04
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.byte 0x05, 0x02, 0x0f, 0x08, 0x09, 0x06, 0x03, 0x0c
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/* For CTR-mode IV byteswap */
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.Lbswap128_mask:
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.byte 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0
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/* For input word byte-swap */
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.Lbswap32_mask:
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.byte 3, 2, 1, 0, 7, 6, 5, 4, 11, 10, 9, 8, 15, 14, 13, 12
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/* CTR byte addition constants */
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.align 32
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.Lbige_addb_0_1:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1
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.Lbige_addb_2_3:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 2
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 3
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.Lbige_addb_4_5:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 4
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 5
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.Lbige_addb_6_7:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 6
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 7
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.Lbige_addb_8_9:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 8
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 9
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.Lbige_addb_10_11:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 10
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 11
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.Lbige_addb_12_13:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 12
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 13
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.Lbige_addb_14_15:
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 14
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.byte 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 15
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.align 4
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/* 4-bit mask */
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.L0f0f0f0f:
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.long 0x0f0f0f0f
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.text
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.align 16
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ELF(.type __sm4_crypt_blk16,@function;)
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__sm4_crypt_blk16:
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/* input:
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* %rdi: ctx, CTX
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* RA0, RA1, RA2, RA3, RB0, RB1, RB2, RB3: sixteen parallel
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* plaintext blocks
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* output:
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* RA0, RA1, RA2, RA3, RB0, RB1, RB2, RB3: sixteen parallel
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* ciphertext blocks
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*/
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CFI_STARTPROC();
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vbroadcasti128 .Lbswap32_mask rRIP, RTMP2;
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vpshufb RTMP2, RA0, RA0;
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vpshufb RTMP2, RA1, RA1;
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vpshufb RTMP2, RA2, RA2;
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vpshufb RTMP2, RA3, RA3;
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vpshufb RTMP2, RB0, RB0;
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vpshufb RTMP2, RB1, RB1;
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vpshufb RTMP2, RB2, RB2;
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vpshufb RTMP2, RB3, RB3;
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vpbroadcastd .L0f0f0f0f rRIP, MASK_4BIT;
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transpose_4x4(RA0, RA1, RA2, RA3, RTMP0, RTMP1);
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transpose_4x4(RB0, RB1, RB2, RB3, RTMP0, RTMP1);
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#define ROUND(round, s0, s1, s2, s3, r0, r1, r2, r3) \
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vpbroadcastd (4*(round))(%rdi), RX0; \
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vbroadcasti128 .Lpre_tf_lo_s rRIP, RTMP4; \
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vbroadcasti128 .Lpre_tf_hi_s rRIP, RTMP1; \
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vmovdqa RX0, RX1; \
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vpxor s1, RX0, RX0; \
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vpxor s2, RX0, RX0; \
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vpxor s3, RX0, RX0; /* s1 ^ s2 ^ s3 ^ rk */ \
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vbroadcasti128 .Lpost_tf_lo_s rRIP, RTMP2; \
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vbroadcasti128 .Lpost_tf_hi_s rRIP, RTMP3; \
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vpxor r1, RX1, RX1; \
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vpxor r2, RX1, RX1; \
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vpxor r3, RX1, RX1; /* r1 ^ r2 ^ r3 ^ rk */ \
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\
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/* sbox, non-linear part */ \
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transform_pre(RX0, RTMP4, RTMP1, MASK_4BIT, RTMP0); \
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transform_pre(RX1, RTMP4, RTMP1, MASK_4BIT, RTMP0); \
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vextracti128 $1, RX0, RTMP4x; \
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vextracti128 $1, RX1, RTMP0x; \
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vaesenclast MASK_4BITx, RX0x, RX0x; \
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vaesenclast MASK_4BITx, RTMP4x, RTMP4x; \
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vaesenclast MASK_4BITx, RX1x, RX1x; \
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vaesenclast MASK_4BITx, RTMP0x, RTMP0x; \
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vinserti128 $1, RTMP4x, RX0, RX0; \
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vbroadcasti128 .Linv_shift_row rRIP, RTMP4; \
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vinserti128 $1, RTMP0x, RX1, RX1; \
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transform_post(RX0, RTMP2, RTMP3, MASK_4BIT, RTMP0); \
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transform_post(RX1, RTMP2, RTMP3, MASK_4BIT, RTMP0); \
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\
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/* linear part */ \
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vpshufb RTMP4, RX0, RTMP0; \
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vpxor RTMP0, s0, s0; /* s0 ^ x */ \
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vpshufb RTMP4, RX1, RTMP2; \
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vbroadcasti128 .Linv_shift_row_rol_8 rRIP, RTMP4; \
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vpxor RTMP2, r0, r0; /* r0 ^ x */ \
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vpshufb RTMP4, RX0, RTMP1; \
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vpxor RTMP1, RTMP0, RTMP0; /* x ^ rol(x,8) */ \
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vpshufb RTMP4, RX1, RTMP3; \
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vbroadcasti128 .Linv_shift_row_rol_16 rRIP, RTMP4; \
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vpxor RTMP3, RTMP2, RTMP2; /* x ^ rol(x,8) */ \
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vpshufb RTMP4, RX0, RTMP1; \
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vpxor RTMP1, RTMP0, RTMP0; /* x ^ rol(x,8) ^ rol(x,16) */ \
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vpshufb RTMP4, RX1, RTMP3; \
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vbroadcasti128 .Linv_shift_row_rol_24 rRIP, RTMP4; \
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vpxor RTMP3, RTMP2, RTMP2; /* x ^ rol(x,8) ^ rol(x,16) */ \
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vpshufb RTMP4, RX0, RTMP1; \
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vpxor RTMP1, s0, s0; /* s0 ^ x ^ rol(x,24) */ \
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vpslld $2, RTMP0, RTMP1; \
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vpsrld $30, RTMP0, RTMP0; \
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vpxor RTMP0, s0, s0; \
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vpxor RTMP1, s0, s0; /* s0 ^ x ^ rol(x,2) ^ rol(x,10) ^ rol(x,18) ^ rol(x,24) */ \
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vpshufb RTMP4, RX1, RTMP3; \
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vpxor RTMP3, r0, r0; /* r0 ^ x ^ rol(x,24) */ \
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vpslld $2, RTMP2, RTMP3; \
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vpsrld $30, RTMP2, RTMP2; \
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vpxor RTMP2, r0, r0; \
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vpxor RTMP3, r0, r0; /* r0 ^ x ^ rol(x,2) ^ rol(x,10) ^ rol(x,18) ^ rol(x,24) */
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leaq (32*4)(%rdi), %rax;
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.align 16
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.Lroundloop_blk16:
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ROUND(0, RA0, RA1, RA2, RA3, RB0, RB1, RB2, RB3);
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ROUND(1, RA1, RA2, RA3, RA0, RB1, RB2, RB3, RB0);
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ROUND(2, RA2, RA3, RA0, RA1, RB2, RB3, RB0, RB1);
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ROUND(3, RA3, RA0, RA1, RA2, RB3, RB0, RB1, RB2);
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leaq (4*4)(%rdi), %rdi;
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cmpq %rax, %rdi;
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jne .Lroundloop_blk16;
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#undef ROUND
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vbroadcasti128 .Lbswap128_mask rRIP, RTMP2;
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transpose_4x4(RA0, RA1, RA2, RA3, RTMP0, RTMP1);
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transpose_4x4(RB0, RB1, RB2, RB3, RTMP0, RTMP1);
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vpshufb RTMP2, RA0, RA0;
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vpshufb RTMP2, RA1, RA1;
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vpshufb RTMP2, RA2, RA2;
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vpshufb RTMP2, RA3, RA3;
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vpshufb RTMP2, RB0, RB0;
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vpshufb RTMP2, RB1, RB1;
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vpshufb RTMP2, RB2, RB2;
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vpshufb RTMP2, RB3, RB3;
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ret_spec_stop;
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CFI_ENDPROC();
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ELF(.size __sm4_crypt_blk16,.-__sm4_crypt_blk16;)
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.align 16
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.globl _gcry_sm4_aesni_avx2_crypt_blk1_16
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ELF(.type _gcry_sm4_aesni_avx2_crypt_blk1_16,@function;)
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_gcry_sm4_aesni_avx2_crypt_blk1_16:
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/* input:
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* %rdi: round key array, CTX
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* %rsi: dst (1..16 blocks)
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* %rdx: src (1..16 blocks)
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* %rcx: num blocks (1..16)
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*/
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CFI_STARTPROC();
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#define LOAD_INPUT(offset, yreg) \
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cmpq $(1 + 2 * (offset)), %rcx; \
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jb .Lblk16_load_input_done; \
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ja 1f; \
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vmovdqu (offset) * 32(%rdx), yreg##x; \
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jmp .Lblk16_load_input_done; \
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1: \
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vmovdqu (offset) * 32(%rdx), yreg;
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LOAD_INPUT(0, RA0);
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LOAD_INPUT(1, RA1);
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LOAD_INPUT(2, RA2);
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LOAD_INPUT(3, RA3);
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LOAD_INPUT(4, RB0);
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LOAD_INPUT(5, RB1);
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LOAD_INPUT(6, RB2);
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LOAD_INPUT(7, RB3);
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#undef LOAD_INPUT
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.Lblk16_load_input_done:
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call __sm4_crypt_blk16;
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#define STORE_OUTPUT(yreg, offset) \
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cmpq $(1 + 2 * (offset)), %rcx; \
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jb .Lblk16_store_output_done; \
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ja 1f; \
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vmovdqu yreg##x, (offset) * 32(%rsi); \
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jmp .Lblk16_store_output_done; \
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1: \
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vmovdqu yreg, (offset) * 32(%rsi);
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STORE_OUTPUT(RA0, 0);
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STORE_OUTPUT(RA1, 1);
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STORE_OUTPUT(RA2, 2);
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STORE_OUTPUT(RA3, 3);
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STORE_OUTPUT(RB0, 4);
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STORE_OUTPUT(RB1, 5);
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STORE_OUTPUT(RB2, 6);
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STORE_OUTPUT(RB3, 7);
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#undef STORE_OUTPUT
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.Lblk16_store_output_done:
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vzeroall;
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xorl %eax, %eax;
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ret_spec_stop;
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CFI_ENDPROC();
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ELF(.size _gcry_sm4_aesni_avx2_crypt_blk1_16,.-_gcry_sm4_aesni_avx2_crypt_blk1_16;)
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#define inc_le128(x, minus_one, tmp) \
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vpcmpeqq minus_one, x, tmp; \
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vpsubq minus_one, x, x; \
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vpslldq $8, tmp, tmp; \
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vpsubq tmp, x, x;
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.align 16
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.globl _gcry_sm4_aesni_avx2_ctr_enc
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ELF(.type _gcry_sm4_aesni_avx2_ctr_enc,@function;)
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_gcry_sm4_aesni_avx2_ctr_enc:
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst (16 blocks)
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* %rdx: src (16 blocks)
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* %rcx: iv (big endian, 128bit)
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*/
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CFI_STARTPROC();
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cmpb $(0x100 - 16), 15(%rcx);
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jbe .Lctr_byteadd;
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movq 8(%rcx), %rax;
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bswapq %rax;
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vbroadcasti128 .Lbswap128_mask rRIP, RTMP3;
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vpcmpeqd RNOT, RNOT, RNOT;
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vpsrldq $8, RNOT, RNOT; /* ab: -1:0 ; cd: -1:0 */
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vpaddq RNOT, RNOT, RTMP2; /* ab: -2:0 ; cd: -2:0 */
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/* load IV and byteswap */
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vmovdqu (%rcx), RTMP4x;
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vpshufb RTMP3x, RTMP4x, RTMP4x;
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vmovdqa RTMP4x, RTMP0x;
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inc_le128(RTMP4x, RNOTx, RTMP1x);
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vinserti128 $1, RTMP4x, RTMP0, RTMP0;
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vpshufb RTMP3, RTMP0, RA0; /* +1 ; +0 */
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/* check need for handling 64-bit overflow and carry */
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cmpq $(0xffffffffffffffff - 16), %rax;
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ja .Lhandle_ctr_carry;
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/* construct IVs */
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vpsubq RTMP2, RTMP0, RTMP0; /* +3 ; +2 */
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vpshufb RTMP3, RTMP0, RA1;
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vpsubq RTMP2, RTMP0, RTMP0; /* +5 ; +4 */
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vpshufb RTMP3, RTMP0, RA2;
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vpsubq RTMP2, RTMP0, RTMP0; /* +7 ; +6 */
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vpshufb RTMP3, RTMP0, RA3;
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vpsubq RTMP2, RTMP0, RTMP0; /* +9 ; +8 */
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vpshufb RTMP3, RTMP0, RB0;
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vpsubq RTMP2, RTMP0, RTMP0; /* +11 ; +10 */
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vpshufb RTMP3, RTMP0, RB1;
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vpsubq RTMP2, RTMP0, RTMP0; /* +13 ; +12 */
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vpshufb RTMP3, RTMP0, RB2;
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vpsubq RTMP2, RTMP0, RTMP0; /* +15 ; +14 */
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vpshufb RTMP3, RTMP0, RB3;
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vpsubq RTMP2, RTMP0, RTMP0; /* +16 */
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vpshufb RTMP3x, RTMP0x, RTMP0x;
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jmp .Lctr_carry_done;
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.Lhandle_ctr_carry:
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/* construct IVs */
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inc_le128(RTMP0, RNOT, RTMP1);
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inc_le128(RTMP0, RNOT, RTMP1);
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vpshufb RTMP3, RTMP0, RA1; /* +3 ; +2 */
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inc_le128(RTMP0, RNOT, RTMP1);
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inc_le128(RTMP0, RNOT, RTMP1);
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vpshufb RTMP3, RTMP0, RA2; /* +5 ; +4 */
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inc_le128(RTMP0, RNOT, RTMP1);
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inc_le128(RTMP0, RNOT, RTMP1);
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vpshufb RTMP3, RTMP0, RA3; /* +7 ; +6 */
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inc_le128(RTMP0, RNOT, RTMP1);
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inc_le128(RTMP0, RNOT, RTMP1);
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vpshufb RTMP3, RTMP0, RB0; /* +9 ; +8 */
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inc_le128(RTMP0, RNOT, RTMP1);
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inc_le128(RTMP0, RNOT, RTMP1);
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vpshufb RTMP3, RTMP0, RB1; /* +11 ; +10 */
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inc_le128(RTMP0, RNOT, RTMP1);
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inc_le128(RTMP0, RNOT, RTMP1);
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vpshufb RTMP3, RTMP0, RB2; /* +13 ; +12 */
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inc_le128(RTMP0, RNOT, RTMP1);
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inc_le128(RTMP0, RNOT, RTMP1);
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vpshufb RTMP3, RTMP0, RB3; /* +15 ; +14 */
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inc_le128(RTMP0, RNOT, RTMP1);
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vextracti128 $1, RTMP0, RTMP0x;
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vpshufb RTMP3x, RTMP0x, RTMP0x; /* +16 */
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.Lctr_carry_done:
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/* store new IV */
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vmovdqu RTMP0x, (%rcx);
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.align 8
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.Lload_ctr_done:
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call __sm4_crypt_blk16;
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vpxor (0 * 32)(%rdx), RA0, RA0;
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vpxor (1 * 32)(%rdx), RA1, RA1;
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vpxor (2 * 32)(%rdx), RA2, RA2;
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vpxor (3 * 32)(%rdx), RA3, RA3;
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vpxor (4 * 32)(%rdx), RB0, RB0;
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vpxor (5 * 32)(%rdx), RB1, RB1;
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vpxor (6 * 32)(%rdx), RB2, RB2;
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vpxor (7 * 32)(%rdx), RB3, RB3;
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vmovdqu RA0, (0 * 32)(%rsi);
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vmovdqu RA1, (1 * 32)(%rsi);
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vmovdqu RA2, (2 * 32)(%rsi);
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vmovdqu RA3, (3 * 32)(%rsi);
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vmovdqu RB0, (4 * 32)(%rsi);
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vmovdqu RB1, (5 * 32)(%rsi);
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vmovdqu RB2, (6 * 32)(%rsi);
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vmovdqu RB3, (7 * 32)(%rsi);
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vzeroall;
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ret_spec_stop;
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.align 8
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.Lctr_byteadd_full_ctr_carry:
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movq 8(%rcx), %r11;
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movq (%rcx), %r10;
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bswapq %r11;
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bswapq %r10;
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addq $16, %r11;
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adcq $0, %r10;
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bswapq %r11;
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bswapq %r10;
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movq %r11, 8(%rcx);
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movq %r10, (%rcx);
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jmp .Lctr_byteadd_ymm;
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.align 8
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.Lctr_byteadd:
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vbroadcasti128 (%rcx), RB3;
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je .Lctr_byteadd_full_ctr_carry;
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addb $16, 15(%rcx);
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.Lctr_byteadd_ymm:
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vpaddb .Lbige_addb_0_1 rRIP, RB3, RA0;
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vpaddb .Lbige_addb_2_3 rRIP, RB3, RA1;
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vpaddb .Lbige_addb_4_5 rRIP, RB3, RA2;
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vpaddb .Lbige_addb_6_7 rRIP, RB3, RA3;
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vpaddb .Lbige_addb_8_9 rRIP, RB3, RB0;
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vpaddb .Lbige_addb_10_11 rRIP, RB3, RB1;
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vpaddb .Lbige_addb_12_13 rRIP, RB3, RB2;
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vpaddb .Lbige_addb_14_15 rRIP, RB3, RB3;
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jmp .Lload_ctr_done;
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CFI_ENDPROC();
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ELF(.size _gcry_sm4_aesni_avx2_ctr_enc,.-_gcry_sm4_aesni_avx2_ctr_enc;)
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.align 16
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.globl _gcry_sm4_aesni_avx2_cbc_dec
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ELF(.type _gcry_sm4_aesni_avx2_cbc_dec,@function;)
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_gcry_sm4_aesni_avx2_cbc_dec:
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst (16 blocks)
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* %rdx: src (16 blocks)
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* %rcx: iv
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*/
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CFI_STARTPROC();
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vmovdqu (0 * 32)(%rdx), RA0;
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vmovdqu (1 * 32)(%rdx), RA1;
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vmovdqu (2 * 32)(%rdx), RA2;
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vmovdqu (3 * 32)(%rdx), RA3;
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vmovdqu (4 * 32)(%rdx), RB0;
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vmovdqu (5 * 32)(%rdx), RB1;
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vmovdqu (6 * 32)(%rdx), RB2;
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vmovdqu (7 * 32)(%rdx), RB3;
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call __sm4_crypt_blk16;
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vmovdqu (%rcx), RNOTx;
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vinserti128 $1, (%rdx), RNOT, RNOT;
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vpxor RNOT, RA0, RA0;
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vpxor (0 * 32 + 16)(%rdx), RA1, RA1;
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vpxor (1 * 32 + 16)(%rdx), RA2, RA2;
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vpxor (2 * 32 + 16)(%rdx), RA3, RA3;
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vpxor (3 * 32 + 16)(%rdx), RB0, RB0;
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vpxor (4 * 32 + 16)(%rdx), RB1, RB1;
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vpxor (5 * 32 + 16)(%rdx), RB2, RB2;
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vpxor (6 * 32 + 16)(%rdx), RB3, RB3;
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vmovdqu (7 * 32 + 16)(%rdx), RNOTx;
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vmovdqu RNOTx, (%rcx); /* store new IV */
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vmovdqu RA0, (0 * 32)(%rsi);
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vmovdqu RA1, (1 * 32)(%rsi);
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vmovdqu RA2, (2 * 32)(%rsi);
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vmovdqu RA3, (3 * 32)(%rsi);
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vmovdqu RB0, (4 * 32)(%rsi);
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vmovdqu RB1, (5 * 32)(%rsi);
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vmovdqu RB2, (6 * 32)(%rsi);
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vmovdqu RB3, (7 * 32)(%rsi);
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vzeroall;
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ret_spec_stop;
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CFI_ENDPROC();
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ELF(.size _gcry_sm4_aesni_avx2_cbc_dec,.-_gcry_sm4_aesni_avx2_cbc_dec;)
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.align 16
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.globl _gcry_sm4_aesni_avx2_cfb_dec
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ELF(.type _gcry_sm4_aesni_avx2_cfb_dec,@function;)
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_gcry_sm4_aesni_avx2_cfb_dec:
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst (16 blocks)
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* %rdx: src (16 blocks)
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* %rcx: iv
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*/
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CFI_STARTPROC();
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/* Load input */
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vmovdqu (%rcx), RNOTx;
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vinserti128 $1, (%rdx), RNOT, RA0;
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vmovdqu (0 * 32 + 16)(%rdx), RA1;
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vmovdqu (1 * 32 + 16)(%rdx), RA2;
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vmovdqu (2 * 32 + 16)(%rdx), RA3;
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vmovdqu (3 * 32 + 16)(%rdx), RB0;
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vmovdqu (4 * 32 + 16)(%rdx), RB1;
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vmovdqu (5 * 32 + 16)(%rdx), RB2;
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vmovdqu (6 * 32 + 16)(%rdx), RB3;
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/* Update IV */
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vmovdqu (7 * 32 + 16)(%rdx), RNOTx;
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vmovdqu RNOTx, (%rcx);
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call __sm4_crypt_blk16;
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vpxor (0 * 32)(%rdx), RA0, RA0;
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vpxor (1 * 32)(%rdx), RA1, RA1;
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vpxor (2 * 32)(%rdx), RA2, RA2;
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vpxor (3 * 32)(%rdx), RA3, RA3;
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vpxor (4 * 32)(%rdx), RB0, RB0;
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vpxor (5 * 32)(%rdx), RB1, RB1;
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vpxor (6 * 32)(%rdx), RB2, RB2;
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vpxor (7 * 32)(%rdx), RB3, RB3;
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vmovdqu RA0, (0 * 32)(%rsi);
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vmovdqu RA1, (1 * 32)(%rsi);
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vmovdqu RA2, (2 * 32)(%rsi);
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vmovdqu RA3, (3 * 32)(%rsi);
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vmovdqu RB0, (4 * 32)(%rsi);
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vmovdqu RB1, (5 * 32)(%rsi);
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vmovdqu RB2, (6 * 32)(%rsi);
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vmovdqu RB3, (7 * 32)(%rsi);
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vzeroall;
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ret_spec_stop;
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CFI_ENDPROC();
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ELF(.size _gcry_sm4_aesni_avx2_cfb_dec,.-_gcry_sm4_aesni_avx2_cfb_dec;)
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.align 16
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.globl _gcry_sm4_aesni_avx2_ocb_enc
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ELF(.type _gcry_sm4_aesni_avx2_ocb_enc,@function;)
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_gcry_sm4_aesni_avx2_ocb_enc:
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst (16 blocks)
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* %rdx: src (16 blocks)
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* %rcx: offset
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* %r8 : checksum
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* %r9 : L pointers (void *L[16])
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*/
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CFI_STARTPROC();
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subq $(4 * 8), %rsp;
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CFI_ADJUST_CFA_OFFSET(4 * 8);
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movq %r10, (0 * 8)(%rsp);
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movq %r11, (1 * 8)(%rsp);
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movq %r12, (2 * 8)(%rsp);
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movq %r13, (3 * 8)(%rsp);
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CFI_REL_OFFSET(%r10, 0 * 8);
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CFI_REL_OFFSET(%r11, 1 * 8);
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CFI_REL_OFFSET(%r12, 2 * 8);
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CFI_REL_OFFSET(%r13, 3 * 8);
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vmovdqu (%rcx), RTMP0x;
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vmovdqu (%r8), RTMP1x;
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/* Offset_i = Offset_{i-1} xor L_{ntz(i)} */
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/* Checksum_i = Checksum_{i-1} xor P_i */
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/* C_i = Offset_i xor ENCIPHER(K, P_i xor Offset_i) */
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#define OCB_INPUT(n, l0reg, l1reg, yreg) \
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vmovdqu (n * 32)(%rdx), yreg; \
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vpxor (l0reg), RTMP0x, RNOTx; \
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vpxor (l1reg), RNOTx, RTMP0x; \
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vinserti128 $1, RTMP0x, RNOT, RNOT; \
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vpxor yreg, RTMP1, RTMP1; \
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vpxor yreg, RNOT, yreg; \
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vmovdqu RNOT, (n * 32)(%rsi);
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movq (0 * 8)(%r9), %r10;
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movq (1 * 8)(%r9), %r11;
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movq (2 * 8)(%r9), %r12;
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movq (3 * 8)(%r9), %r13;
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OCB_INPUT(0, %r10, %r11, RA0);
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OCB_INPUT(1, %r12, %r13, RA1);
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movq (4 * 8)(%r9), %r10;
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movq (5 * 8)(%r9), %r11;
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movq (6 * 8)(%r9), %r12;
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movq (7 * 8)(%r9), %r13;
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OCB_INPUT(2, %r10, %r11, RA2);
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OCB_INPUT(3, %r12, %r13, RA3);
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movq (8 * 8)(%r9), %r10;
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movq (9 * 8)(%r9), %r11;
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movq (10 * 8)(%r9), %r12;
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movq (11 * 8)(%r9), %r13;
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OCB_INPUT(4, %r10, %r11, RB0);
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OCB_INPUT(5, %r12, %r13, RB1);
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movq (12 * 8)(%r9), %r10;
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movq (13 * 8)(%r9), %r11;
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movq (14 * 8)(%r9), %r12;
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movq (15 * 8)(%r9), %r13;
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OCB_INPUT(6, %r10, %r11, RB2);
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OCB_INPUT(7, %r12, %r13, RB3);
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#undef OCB_INPUT
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vextracti128 $1, RTMP1, RNOTx;
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vmovdqu RTMP0x, (%rcx);
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vpxor RNOTx, RTMP1x, RTMP1x;
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vmovdqu RTMP1x, (%r8);
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movq (0 * 8)(%rsp), %r10;
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movq (1 * 8)(%rsp), %r11;
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movq (2 * 8)(%rsp), %r12;
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movq (3 * 8)(%rsp), %r13;
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CFI_RESTORE(%r10);
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CFI_RESTORE(%r11);
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CFI_RESTORE(%r12);
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CFI_RESTORE(%r13);
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call __sm4_crypt_blk16;
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addq $(4 * 8), %rsp;
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CFI_ADJUST_CFA_OFFSET(-4 * 8);
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vpxor (0 * 32)(%rsi), RA0, RA0;
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vpxor (1 * 32)(%rsi), RA1, RA1;
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vpxor (2 * 32)(%rsi), RA2, RA2;
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vpxor (3 * 32)(%rsi), RA3, RA3;
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vpxor (4 * 32)(%rsi), RB0, RB0;
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vpxor (5 * 32)(%rsi), RB1, RB1;
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vpxor (6 * 32)(%rsi), RB2, RB2;
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vpxor (7 * 32)(%rsi), RB3, RB3;
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vmovdqu RA0, (0 * 32)(%rsi);
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vmovdqu RA1, (1 * 32)(%rsi);
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vmovdqu RA2, (2 * 32)(%rsi);
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vmovdqu RA3, (3 * 32)(%rsi);
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vmovdqu RB0, (4 * 32)(%rsi);
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vmovdqu RB1, (5 * 32)(%rsi);
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vmovdqu RB2, (6 * 32)(%rsi);
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vmovdqu RB3, (7 * 32)(%rsi);
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vzeroall;
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ret_spec_stop;
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CFI_ENDPROC();
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ELF(.size _gcry_sm4_aesni_avx2_ocb_enc,.-_gcry_sm4_aesni_avx2_ocb_enc;)
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.align 16
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.globl _gcry_sm4_aesni_avx2_ocb_dec
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ELF(.type _gcry_sm4_aesni_avx2_ocb_dec,@function;)
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_gcry_sm4_aesni_avx2_ocb_dec:
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/* input:
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* %rdi: ctx, CTX
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* %rsi: dst (16 blocks)
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* %rdx: src (16 blocks)
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* %rcx: offset
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* %r8 : checksum
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* %r9 : L pointers (void *L[16])
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*/
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CFI_STARTPROC();
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subq $(4 * 8), %rsp;
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CFI_ADJUST_CFA_OFFSET(4 * 8);
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movq %r10, (0 * 8)(%rsp);
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movq %r11, (1 * 8)(%rsp);
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movq %r12, (2 * 8)(%rsp);
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movq %r13, (3 * 8)(%rsp);
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CFI_REL_OFFSET(%r10, 0 * 8);
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CFI_REL_OFFSET(%r11, 1 * 8);
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CFI_REL_OFFSET(%r12, 2 * 8);
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CFI_REL_OFFSET(%r13, 3 * 8);
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vmovdqu (%rcx), RTMP0x;
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/* Offset_i = Offset_{i-1} xor L_{ntz(i)} */
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/* C_i = Offset_i xor ENCIPHER(K, P_i xor Offset_i) */
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#define OCB_INPUT(n, l0reg, l1reg, yreg) \
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vmovdqu (n * 32)(%rdx), yreg; \
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vpxor (l0reg), RTMP0x, RNOTx; \
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vpxor (l1reg), RNOTx, RTMP0x; \
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vinserti128 $1, RTMP0x, RNOT, RNOT; \
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vpxor yreg, RNOT, yreg; \
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vmovdqu RNOT, (n * 32)(%rsi);
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movq (0 * 8)(%r9), %r10;
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movq (1 * 8)(%r9), %r11;
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movq (2 * 8)(%r9), %r12;
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movq (3 * 8)(%r9), %r13;
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OCB_INPUT(0, %r10, %r11, RA0);
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OCB_INPUT(1, %r12, %r13, RA1);
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movq (4 * 8)(%r9), %r10;
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movq (5 * 8)(%r9), %r11;
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movq (6 * 8)(%r9), %r12;
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movq (7 * 8)(%r9), %r13;
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OCB_INPUT(2, %r10, %r11, RA2);
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OCB_INPUT(3, %r12, %r13, RA3);
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movq (8 * 8)(%r9), %r10;
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movq (9 * 8)(%r9), %r11;
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movq (10 * 8)(%r9), %r12;
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movq (11 * 8)(%r9), %r13;
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OCB_INPUT(4, %r10, %r11, RB0);
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OCB_INPUT(5, %r12, %r13, RB1);
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movq (12 * 8)(%r9), %r10;
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movq (13 * 8)(%r9), %r11;
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movq (14 * 8)(%r9), %r12;
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movq (15 * 8)(%r9), %r13;
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OCB_INPUT(6, %r10, %r11, RB2);
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OCB_INPUT(7, %r12, %r13, RB3);
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#undef OCB_INPUT
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vmovdqu RTMP0x, (%rcx);
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movq (0 * 8)(%rsp), %r10;
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movq (1 * 8)(%rsp), %r11;
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movq (2 * 8)(%rsp), %r12;
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movq (3 * 8)(%rsp), %r13;
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CFI_RESTORE(%r10);
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CFI_RESTORE(%r11);
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CFI_RESTORE(%r12);
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CFI_RESTORE(%r13);
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|
|
call __sm4_crypt_blk16;
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|
|
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addq $(4 * 8), %rsp;
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CFI_ADJUST_CFA_OFFSET(-4 * 8);
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|
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vmovdqu (%r8), RTMP1x;
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|
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vpxor (0 * 32)(%rsi), RA0, RA0;
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vpxor (1 * 32)(%rsi), RA1, RA1;
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vpxor (2 * 32)(%rsi), RA2, RA2;
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vpxor (3 * 32)(%rsi), RA3, RA3;
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vpxor (4 * 32)(%rsi), RB0, RB0;
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vpxor (5 * 32)(%rsi), RB1, RB1;
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vpxor (6 * 32)(%rsi), RB2, RB2;
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vpxor (7 * 32)(%rsi), RB3, RB3;
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|
|
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/* Checksum_i = Checksum_{i-1} xor P_i */
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vmovdqu RA0, (0 * 32)(%rsi);
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|
vpxor RA0, RTMP1, RTMP1;
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vmovdqu RA1, (1 * 32)(%rsi);
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vpxor RA1, RTMP1, RTMP1;
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vmovdqu RA2, (2 * 32)(%rsi);
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vpxor RA2, RTMP1, RTMP1;
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|
vmovdqu RA3, (3 * 32)(%rsi);
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vpxor RA3, RTMP1, RTMP1;
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|
vmovdqu RB0, (4 * 32)(%rsi);
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|
vpxor RB0, RTMP1, RTMP1;
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|
vmovdqu RB1, (5 * 32)(%rsi);
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|
vpxor RB1, RTMP1, RTMP1;
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|
vmovdqu RB2, (6 * 32)(%rsi);
|
|
vpxor RB2, RTMP1, RTMP1;
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|
vmovdqu RB3, (7 * 32)(%rsi);
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|
vpxor RB3, RTMP1, RTMP1;
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|
|
|
vextracti128 $1, RTMP1, RNOTx;
|
|
vpxor RNOTx, RTMP1x, RTMP1x;
|
|
vmovdqu RTMP1x, (%r8);
|
|
|
|
vzeroall;
|
|
|
|
ret_spec_stop;
|
|
CFI_ENDPROC();
|
|
ELF(.size _gcry_sm4_aesni_avx2_ocb_dec,.-_gcry_sm4_aesni_avx2_ocb_dec;)
|
|
|
|
.align 16
|
|
.globl _gcry_sm4_aesni_avx2_ocb_auth
|
|
ELF(.type _gcry_sm4_aesni_avx2_ocb_auth,@function;)
|
|
|
|
_gcry_sm4_aesni_avx2_ocb_auth:
|
|
/* input:
|
|
* %rdi: ctx, CTX
|
|
* %rsi: abuf (16 blocks)
|
|
* %rdx: offset
|
|
* %rcx: checksum
|
|
* %r8 : L pointers (void *L[16])
|
|
*/
|
|
CFI_STARTPROC();
|
|
|
|
subq $(4 * 8), %rsp;
|
|
CFI_ADJUST_CFA_OFFSET(4 * 8);
|
|
|
|
movq %r10, (0 * 8)(%rsp);
|
|
movq %r11, (1 * 8)(%rsp);
|
|
movq %r12, (2 * 8)(%rsp);
|
|
movq %r13, (3 * 8)(%rsp);
|
|
CFI_REL_OFFSET(%r10, 0 * 8);
|
|
CFI_REL_OFFSET(%r11, 1 * 8);
|
|
CFI_REL_OFFSET(%r12, 2 * 8);
|
|
CFI_REL_OFFSET(%r13, 3 * 8);
|
|
|
|
vmovdqu (%rdx), RTMP0x;
|
|
|
|
/* Offset_i = Offset_{i-1} xor L_{ntz(i)} */
|
|
/* Sum_i = Sum_{i-1} xor ENCIPHER(K, A_i xor Offset_i) */
|
|
|
|
#define OCB_INPUT(n, l0reg, l1reg, yreg) \
|
|
vmovdqu (n * 32)(%rsi), yreg; \
|
|
vpxor (l0reg), RTMP0x, RNOTx; \
|
|
vpxor (l1reg), RNOTx, RTMP0x; \
|
|
vinserti128 $1, RTMP0x, RNOT, RNOT; \
|
|
vpxor yreg, RNOT, yreg;
|
|
|
|
movq (0 * 8)(%r8), %r10;
|
|
movq (1 * 8)(%r8), %r11;
|
|
movq (2 * 8)(%r8), %r12;
|
|
movq (3 * 8)(%r8), %r13;
|
|
OCB_INPUT(0, %r10, %r11, RA0);
|
|
OCB_INPUT(1, %r12, %r13, RA1);
|
|
movq (4 * 8)(%r8), %r10;
|
|
movq (5 * 8)(%r8), %r11;
|
|
movq (6 * 8)(%r8), %r12;
|
|
movq (7 * 8)(%r8), %r13;
|
|
OCB_INPUT(2, %r10, %r11, RA2);
|
|
OCB_INPUT(3, %r12, %r13, RA3);
|
|
movq (8 * 8)(%r8), %r10;
|
|
movq (9 * 8)(%r8), %r11;
|
|
movq (10 * 8)(%r8), %r12;
|
|
movq (11 * 8)(%r8), %r13;
|
|
OCB_INPUT(4, %r10, %r11, RB0);
|
|
OCB_INPUT(5, %r12, %r13, RB1);
|
|
movq (12 * 8)(%r8), %r10;
|
|
movq (13 * 8)(%r8), %r11;
|
|
movq (14 * 8)(%r8), %r12;
|
|
movq (15 * 8)(%r8), %r13;
|
|
OCB_INPUT(6, %r10, %r11, RB2);
|
|
OCB_INPUT(7, %r12, %r13, RB3);
|
|
#undef OCB_INPUT
|
|
|
|
vmovdqu RTMP0x, (%rdx);
|
|
|
|
movq (0 * 8)(%rsp), %r10;
|
|
movq (1 * 8)(%rsp), %r11;
|
|
movq (2 * 8)(%rsp), %r12;
|
|
movq (3 * 8)(%rsp), %r13;
|
|
CFI_RESTORE(%r10);
|
|
CFI_RESTORE(%r11);
|
|
CFI_RESTORE(%r12);
|
|
CFI_RESTORE(%r13);
|
|
|
|
call __sm4_crypt_blk16;
|
|
|
|
addq $(4 * 8), %rsp;
|
|
CFI_ADJUST_CFA_OFFSET(-4 * 8);
|
|
|
|
vpxor RA0, RB0, RA0;
|
|
vpxor RA1, RB1, RA1;
|
|
vpxor RA2, RB2, RA2;
|
|
vpxor RA3, RB3, RA3;
|
|
|
|
vpxor RA1, RA0, RA0;
|
|
vpxor RA3, RA2, RA2;
|
|
|
|
vpxor RA2, RA0, RTMP1;
|
|
|
|
vextracti128 $1, RTMP1, RNOTx;
|
|
vpxor (%rcx), RTMP1x, RTMP1x;
|
|
vpxor RNOTx, RTMP1x, RTMP1x;
|
|
vmovdqu RTMP1x, (%rcx);
|
|
|
|
vzeroall;
|
|
|
|
ret_spec_stop;
|
|
CFI_ENDPROC();
|
|
ELF(.size _gcry_sm4_aesni_avx2_ocb_auth,.-_gcry_sm4_aesni_avx2_ocb_auth;)
|
|
|
|
#endif /*defined(ENABLE_AESNI_SUPPORT) && defined(ENABLE_AVX_SUPPORT)*/
|
|
#endif /*__x86_64*/
|